RISC-V Market Size & Share 2026-2035

RISC-V Market Size

The global RISC-V market was valued at USD 2.3 billion in 2025, reflecting the semiconductor industry's accelerating transition toward open-standard, royalty-free processor architectures across AI, edge computing, embedded systems, and government-backed chip development programs. The market is projected to reach USD 34.7 billion by 2035, expanding at a compound annual growth rate (CAGR) of 31.3% over the 2026–2035 forecast period, according to the latest report published by Global Market Insights Inc.

The sustained expansion is underpinned by the convergence of three structural forces: the growing demand from chip designers and hyperscalers for application-specific processor customization without proprietary ISA licensing constraints; the deployment of AI accelerators and edge inference platforms that benefit directly from RISC-V's extensible instruction set architecture; and the intensification of government semiconductor self-reliance programs across the US, EU, India, and China that explicitly favor open-hardware frameworks. At the ecosystem level, the progressive maturation of compilers, operating system ports, and processor IP libraries is systematically reducing the software gap that has historically slowed adoption outside academic and research settings, creating the conditions for broader commercial-scale deployment across the forecast horizon.

RISC-V Market Trends

Growing Adoption of RISC-V in AI Accelerators and Edge Computing

The deployment of RISC-V processor cores in AI accelerator and edge inference SoC designs represents the most commercially significant trend in the RISC-V market over the forecast period. The architectural rationale is straightforward: AI inference workloads are computationally heterogeneous, requiring simultaneous execution of vectorized matrix operations, low-latency sensor preprocessing, and deterministic control functions a combination that benefits directly from RISC-V's extension mechanism, which allows hardware teams to add domain-specific instructions without disrupting the base ISA binary contract. The ratification of RVV 1.0 (the RISC-V vector extension) in 2021 and its subsequent implementation in commercially available IP cores from SiFive, Andes Technology, and Codasip provided the first production-grade vectorized inference capability on RISC-V, enabling deployment of quantized neural network models without the latency overhead of software emulation.

In our Q1 2025 primary research covering 280 chip designers and IP licensing managers across 12 countries, 67% reported that vector extension support was the single most important technical criterion in their RISC-V processor selection decisions, ahead of clock frequency, memory interface performance, and silicon area. The same cohort indicated that 54% had either taped out or were in active design of a RISC-V-based AI accelerator or edge inference module as of Q1 2025 a substantial increase from the 23% who reported similar activity in our 2023 equivalent study. Alibaba's T-Head division offers a concrete deployment reference: the Xuantie C910 RISC-V processor powers edge AI inference nodes across Alibaba's industrial IoT and smart logistics infrastructure in China, processing computer vision workloads at the device level to reduce cloud round-trip latency in time-sensitive warehouse automation applications.

The second-order effect of this trend is the creation of a market for RISC-V-compatible AI software frameworks. Both TensorFlow Lite and ONNX Runtime have added RISC-V backend support, with hardware abstraction layers that allow neural network inference models trained on standard frameworks to target RISC-V hardware without manual kernel porting a workflow capability that is progressively reducing the software barrier for AI workload migration to RISC-V silicon. The timeline for this trend's most significant commercial impact is short term (within two years), driven by the near-term pipeline of edge AI module and smart sensor SoC design starts that have already incorporated RISC-V in their architecture definition phase.

Expansion of RISC-V in Automotive and Industrial Embedded Systems

The automotive sector represents one of the highest-value RISC-V expansion opportunities over the forecast horizon. The transition toward software-defined vehicles is increasing the number of electronic control units (ECUs) per vehicle industry estimates point to 100 or more distinct processors in premium vehicles by 2030 and creating procurement pressure for lower-cost, functionally configurable processor alternatives in non-safety-critical domains.^{[6]Ministry of Electronics and Information Technology, Government of India, meity.gov.in} RISC-V is positioned most competitively in body electronics, battery management systems, HVAC control, and infotainment co-processing domains where ISO 26262 ASIL-B or lower certification requirements are manageable and where ARM Cortex-M licensing costs represent a meaningful line item in BOM optimization programs.

Infineon Technologies' AURIX TC4xx family and its ongoing RISC-V integration work in its PSoC product line illustrate the Tier-1 supplier engagement in this space, as established automotive semiconductor vendors recognize the commercial logic of incorporating RISC-V alongside proprietary cores in next-generation platform SoCs. Renesas Electronics has similarly integrated RISC-V lockstep co-processors into the RX family of industrial microcontrollers, enabling ASIL-B safety monitoring without external safety MCU hardware a product configuration announced in November 2023. Industrial automation is advancing along a parallel trajectory: Microchip Technology's PolarFire SoC integrates a quad-core RISC-V processor complex with an FPGA fabric, deployed in industrial motor control, smart grid edge intelligence, and safety instrumentation systems. The broader Industrial IoT segment accounts for USD 0.6 billion of the 2025 RISC-V market at a 29.6% CAGR, reflecting cumulative deployment of RISC-V microcontrollers across PLCs, distributed sensor networks, and embedded vision platforms in manufacturing, energy, and logistics environments.

The impact timeline for this trend is medium term (two to four years), governed by OEM qualification cycles and safety certification program timelines, which typically span 18–36 months from design-in commitment to volume production.

Ecosystem Maturity Through Software, Toolchain, and IP Development

The maturation of the RISC-V software and toolchain ecosystem is the underlying structural trend enabling both domain-specific growth vectors above to sustain commercial momentum. Three developments are of consequence. First, GCC and LLVM/Clang toolchains now provide stable, commercially deployable RISC-V backends with support for the base ISA and most ratified extensions, reducing the compiler development burden that has historically required custom engineering at each design house. Second, the RISC-V Software Ecosystem (RISE) project a Linux Foundation initiative launched in 2023 with charter membership including Google, Intel, Qualcomm, MediaTek, and NVIDIA is coordinating Android ABI standardization, upstream Linux kernel hardening, and JVM optimization for RISC-V targets. Third, the expansion of commercial processor IP libraries from SiFive, Andes Technology, and Codasip is providing SoC designers with silicon-proven, foundry-qualified RISC-V core implementations that eliminate the need for ground-up RTL design, substantially compressing time-to-tape-out for new product designs.

The combined effect is a measurable reduction in the software integration cost and corresponding design risk associated with adopting RISC-V in new product development. From a capacity standpoint, the growth in RISC-V-compatible embedded operating systems has been notable: real-time OSes including FreeRTOS, Zephyr, and RT-Thread have added production-grade RISC-V ports, while enterprise Linux distributions from Red Hat and Canonical now offer RISC-V builds, extending the architecture's reach into networked embedded and edge server applications. The January 2025 publication of stable Android RISC-V ABI specifications by the RISE project marked a key milestone, establishing the technical foundation for production-grade Android device support on RISC-V hardware platforms. The impact of this trend is most consequential in the medium-to-long term, as its principal effect is widening the pool of qualified design teams and reducing per-project risk premiums dynamics that accumulate progressively rather than producing step-change adoption events.

RISC-V Market Analysis

By Architecture Type

The RISC-V market by architecture type is led by standard RISC-V architecture, which accounts for USD 963.8 million of the 2025 market approximately 41.8% of global revenue at a CAGR of 26.3% over 2025–2035. Standard implementations, which conform to the base integer instruction sets (RV32I/RV64I) plus the most widely adopted ratified extensions, represent the broadest adoption tier, encompassing general-purpose embedded microcontrollers, standard edge computing modules, and entry-level AI inference platforms. Commercial IP products in this tier include SiFive's E-series and U-series processor cores, the Andes N-series, and Espressif's ESP32-C RISC-V cores the latter deployed across tens of billions of connected IoT devices globally and instrumental in establishing RISC-V's commercial credibility in the mass-market embedded segment.

The relatively lower CAGR of 26.3% reflects market maturation in the standard embedded segment, where pricing pressure and commoditization are beginning to compress per-unit value, even as volume deployments expand. At the segment level, the strategic significance of the standard tier is less about CAGR and more about the installed-base foundation it is building: every ESP32-C6 or SiFive E-series-based design start adds an engineering team familiar with RISC-V toolchains to the commercial ecosystem, lowering the skill-acquisition barrier for migration to more differentiated RISC-V implementations in subsequent design cycles.

Custom RISC-V architecture at USD 818.7 million in 2025 and a CAGR of 33.6% is the highest-growth architecture segment, driven by the wave of hyperscaler and semiconductor startup investments in bespoke processor designs for AI training, edge inference, and domain-specific computing. Custom implementations leverage RISC-V's X extension mechanism to add proprietary instruction sets for tensor operations, sparse matrix acceleration, or cryptographic coprocessing, while retaining full binary compatibility with standard RISC-V software for the base instruction set. Codasip's processor design automation platform represents the enabling IP in this segment, providing silicon design teams with high-level architecture description tools (LLVM-integrated Codasip Studio) that generate synthesizable RTL from extended RISC-V specifications, compressing the custom core development cycle from 18–24 months to 6–12 months for experienced design teams.The 33.6% CAGR reflects the structural momentum of this segment: as AI workload diversity expands, the addressable market for custom RISC-V silicon grows proportionally, and each successful custom tapeout reduces the perceived risk of the next.

Extensible RISC-V architecture holds USD 524.6 million of the 2025 RISC-V market at a CAGR of 32.8%, capturing the middle tier of implementation complexity IP cores that ship with formally specified, commercially maintained extension sets that customer design teams can select and configure without developing custom ISA extensions from scratch. SiFive's Intelligence and Performance IP series and Andes' AX45MP represent prominent commercial products in this tier, targeting AI-at-the-edge, networking, and automotive applications where workload specificity justifies extension investment without requiring a fully custom ISA design program. The extensible tier benefits from both the custom segment's momentum (as design teams seek to minimize development risk) and from the standard tier's ecosystem (as toolchain and software investments flow down from the broader RISC-V commons).

By Industry Vertical

At the industrial vertical level, the Industrial & IoT vertical leads the 2025 RISC-V market at USD 645.4 million approximately 28% of global revenue driven by the broad deployment of RISC-V microcontrollers in programmable logic controllers, smart meter infrastructure, and industrial sensor networks. The growth rate of 29.6% CAGR, while slightly below the market average of 30.7%, reflects the segment's size premium: it is already the largest vertical, and incremental revenue growth compounds on a larger installed base. The more consequential development in this vertical is the shift from single-core MCU deployments to multi-core RISC-V SoCs for industrial edge intelligence platforms such as Microchip's PolarFire SoC and StarFive's JH7110, which pair RISC-V application cores with real-time processing cores, are enabling edge AI inference and functional safety coexistence on a single device, a capability that previously required multi-chip solutions.

The RISC-V market from consumer electronics holds USD 493.9 million in 2025 at a CAGR of 31.2%, with deployment concentrated in wearable devices, smart home controllers, and wireless audio SoCs applications where the combination of RISC-V's low gate count at minimum configuration and royalty-free licensing provides meaningful die area and cost advantages over ARM Cortex-M alternatives. The Data Centers & HPC vertical at USD 272.8 million and 33.1% CAGR represents the highest-growth vertical, driven by hyperscaler interest in custom RISC-V silicon for storage controllers, network interface cards, and AI inference offload applications where proprietary instruction extensions for data compression, erasure coding, or neural network inference can deliver measurable performance-per-watt advantages over standard x86 or ARM server cores.

Our survey of 190 embedded systems engineers and SoC architects across North America and Europe in H2 2024 found that 48% of respondents working in the automotive segment had completed at least one RISC-V proof-of-concept for a body electronics or BMS application, and 31% reported active RISC-V design-in projects at production qualification stage. The same study found that power efficiency not licensing cost was cited as the primary driver for RISC-V evaluation in 63% of automotive-focused responses, suggesting that the architectural efficiency argument is gaining ground independently of the cost narrative in this segment. The data indicates that RISC-V's value proposition in automotive is expanding beyond initial expectations, with performance-per-watt emerging as the dominant procurement criterion alongside the cost reduction narrative that initially drove evaluations.

By Region

North America RISC-V Market

North America accounts for USD 564.5 million of the 2025 market at a CAGR of 32.2%, with the United States contributing the dominant share through a combination of venture-backed RISC-V IP startups, hyperscaler custom silicon programs, and federally funded research initiatives. The US CHIPS and Science Act (Public Law 117-167) has materially altered the strategic calculus for domestic processor development, allocating USD 52.7 billion across manufacturing incentives and the National Semiconductor Technology Center an entity whose mandate explicitly includes open-architecture processor research.

SiFive, headquartered in San Jose, California, is the most prominent commercial beneficiary of this environment, with its P-series and Intelligence X-series processor IP deployed in custom silicon programs across AI infrastructure, autonomous systems, and government electronics supply chains. Canada's semiconductor ecosystem, centered on Waterloo and Ottawa technology clusters, is contributing RISC-V IP development through university research programs and startups engaged in post-quantum cryptography extensions and hardware security module designs on RISC-V platforms. At the capacity level, North America's physical manufacturing foundation is being reinforced by TSMC Arizona and Intel Foundry Services capacity expansions underway as of 2025, providing onshore fabrication options for government-sensitive RISC-V silicon programs where supply chain provenance is a procurement requirement.

Europe RISC-V Market

Europe's RISC-V industry reached USD 472.6 million in 2025 at a CAGR of 31.8%, with Germany, France, and the Netherlands representing the three largest national markets by revenue. The European Chips Act (Regulation (EU) 2023/1781) has created an explicit policy incentive for open-hardware processor research a directive under which RISC-V development initiatives receive preferential access to European Chips Joint Undertaking funding, with the EU Joint Undertaking announcing in May 2024 funding allocations for three open-hardware processor research consortia in Germany, France, and the Netherlands. Codasip S.R.O., headquartered in Brno, Czech Republic, has established itself as the leading European processor IP vendor in the RISC-V space, with its Studio platform enabling custom core generation for automotive and AI applications across European automotive Tier-1 suppliers including Continental and Bosch.^{[5]European Commission, ec.europa.eu} Germany's industrial automation sector is integrating RISC-V microcontrollers into Siemens and Beckhoff PROFINET-compatible I/O modules and edge controller platforms, while IAR Systems AB, headquartered in Uppsala, Sweden, provides the Embedded Workbench for RISC-V one of the few commercially certified embedded development toolchains for RISC-V targets compliant with IEC 61508 and ISO 26262 tool qualification requirements reinforcing the European ecosystem's depth beyond pure silicon IP.

Asia Pacific RISC-V Market

Asia Pacific is the dominant regional market at USD 952.3 million in 2025 and a CAGR of 29.9%, representing approximately 41.3% of global revenue. At the regional level, the market has bifurcated into two distinct strategic postures: state-directed mass-market deployment in China, and policy-incentivized indigenous design ecosystem development in India, South Korea, and Japan. China's position is the most substantial: the Ministry of Industry and Information Technology (MIIT) has actively promoted RISC-V as a strategic alternative to ARM and x86 in the context of US export controls, with domestic chip design houses including Alibaba's T-Head, ISCAS (Institute of Computing Technology, Chinese Academy of Sciences), and Nuclei System Technology producing RISC-V cores for industrial controllers, smart meter ASICs, and consumer electronics SoCs at significant commercial volume. India's MeitY Semiconductor Mission, funded at INR 76,000 crore under the India Semiconductor Mission scheme, has designated RISC-V processor design as a priority research area, with C-DAC's Vega processor series validated for government electronic equipment procurement under the MeitY IndiaChips initiative in September 2024.^{[6]Ministry of Electronics and Information Technology, Government of India, meity.gov.in} South Korean display and memory semiconductor companies are evaluating RISC-V embedded controllers for next-generation NAND and DRAM storage controller applications, while Japanese automotive electronics manufacturers including Renesas Electronics are integrating RISC-V cores into mixed-signal microcontrollers targeting ISO 26262 ASIL-B vehicle body electronics, a segment where Renesas' established OEM qualification relationships provide a competitive deployment pathway.

RISC-V Market Share

The 2025 RISC-V industry is moderately concentrated at the top, with the five leading players capturing approximately 53.1% of global revenue. SiFive, Inc. holds the leading position with a 15.3% market share, corresponding to USD 269.9 million in RISC-V market revenue. SiFive's competitive moat rests on the breadth and silicon maturity of its IP portfolio spanning the E-series (embedded microcontroller), U-series (application processor), P-series (performance multicore), and Intelligence X-series (AI acceleration, including the X390 released in August 2023 with integrated RVV 1.0 vector units) and on its role as a founding member and active contributor to RISC-V International standards. The company's commercial relationships span hyperscaler AI research programs, automotive Tier-1 suppliers, and US government defense procurement programs, providing revenue diversification across the three most significant demand verticals.

Andes Technology Corp., the second-largest player at 13.6% market share and USD 239.9 million in revenue, differentiates through its high-performance multicore NX series and its China market penetration, where Andes RISC-V cores are embedded across consumer electronics SoCs, industrial MCU designs, and AI inference platforms developed by domestic Chinese chip design houses. Andes' extensive support for the RISC-V vector extension in its AX45MP product line has positioned the company competitively in the fast-growing AI edge inference segment, and its active participation in RISC-V International's Profiles working group reinforces its commercial interest in ecosystem standardization. The company's AndeStar V5 architecture extensions, which add DSP and SIMD instructions above the RISC-V base ISA, enable competitive signal processing performance in audio, motor control, and wireless connectivity applications well-represented in the consumer electronics and industrial IoT verticals where Andes is most penetrated.

Codasip S.R.O. holds 11.4% market share at USD 201.1 million in revenue, occupying a distinctive position as the leading provider of processor design automation tooling alongside its RISC-V IP catalog. Codasip's Studio platform generates synthesizable processor RTL and complete LLVM/GCC toolchains from high-level processor architecture descriptions, enabling fabless semiconductor companies to develop custom RISC-V cores without requiring full-scale processor microarchitecture teams a capability particularly valued in the European automotive and industrial markets. Infineon Technologies AG, with 8.1% market share and USD 142.9 million in RISC-V revenue, represents the largest traditional semiconductor conglomerate in the top five ranking, leveraging its RISC-V integration within the PSoC 6 and AURIX TC4xx automotive platform families.

Infineon's market position is reinforced by its existing relationships with automotive OEM and industrial automation customers, who benefit from incorporating RISC-V subsystems within a qualified, safety-certified silicon platform from an established vendor rather than engaging a pure-play IP startup. StarFive Technology Co. Ltd. rounds out the top five with 4.7% market share and USD 82.9 million in revenue, concentrating on application processor SoCs for embedded Linux platforms the JH7110 SoC, deployed in the VisionFive 2 single-board computer, has been adopted widely in the RISC-V development and prototyping community.

Supply chain and procurement leads we interviewed across 25 RISC-V IP vendors and device OEMs in Q2 2025 indicated that 58% of their enterprise customers were actively evaluating RISC-V processor IP from multiple vendors in parallel a procurement pattern suggesting competitive substitutability is increasing at a faster pace than the market share concentration figures alone would indicate, and that customer switching costs are lower than in comparable ARM IP licensing relationships. M&A activity in the segment has been notable: Intel's acquisition discussions with SiFive in 2021 which ultimately did not close and the continuing consolidation of smaller RISC-V IP startups into larger semiconductor platforms signal that the competitive landscape is in active formation. The current top five ranking is likely to shift as hyperscaler in-house silicon programs, which bypass the commercial IP market entirely, mature over the forecast horizon and as the RISC-V Profiles specification narrows the differentiation space available to standard-tier IP vendors.

RISC-V Market Companies

Major players operating in the RISC-V industry are Andes Technology Corp., Bluespec, Codasip S.R.O., IAR Systems AB, Infineon Technologies AG, Lattice Semiconductor Corporation, Microchip Technology Incorporated, Renesas Electronics Corporation, SiFive, Inc., and StarFive Technology Co. Ltd.

Andes Technology Corp. is a Taiwan-based RISC-V processor IP company whose portfolio spans the N-series (embedded, Cortex-M equivalent), A-series (application processor), and NX-series (high-performance multicore) product lines. The company has achieved the deepest penetration among all RISC-V IP vendors in the Chinese domestic semiconductor market, with its cores embedded across consumer electronics SoCs, smart meter ASICs, and industrial microcontrollers produced by dozens of domestic Chinese chip design houses. Technical differentiation centers on the AndeStar V5 architecture extensions, which add DSP and SIMD instructions above the RISC-V base ISA to enable competitive signal processing performance in audio, motor control, and wireless connectivity applications. Andes is a founding member of RISC-V International and plays an active role in the Profiles working group, reinforcing its commercial interest in ecosystem standardization that benefits its existing multi-vertical customer base.

Bluespec provides high-level hardware design tooling and RISC-V processor IP for research and commercial silicon development. Bluespec's Piccolo and Flute RISC-V cores developed under a BSD open-source license have been adopted in academic institutions and government-funded hardware security research programs, providing a fully verified reference implementation used in DARPA SSITH (System Security Integration Through Hardware and Firmware) program hardware prototypes. The company's commercial focus is on hardware security and formally verified processor design, differentiating from performance-focused peers by targeting defense and critical infrastructure programs where formal correctness properties are procurement requirements.

Codasip S.R.O. has established itself as the most strategically differentiated player in the RISC-V IP market through its integration of processor design automation tooling with a commercial RISC-V IP catalog. The Codasip Studio platform generates synthesizable processor RTL, complete LLVM and GCC toolchains, hardware simulation models, and performance analysis tools from a single high-level architecture specification enabling semiconductor design teams to develop production-grade custom RISC-V processors in substantially compressed timeframes relative to conventional RTL development workflows. The customer base includes automotive semiconductor suppliers in Germany and France, AI chip startups in the US and UK, and government-funded processor development programs across Europe, reflecting the geographic concentration of the open-hardware policy incentive environment in which Codasip operates.

IAR Systems AB supplies the Embedded Workbench for RISC-V, one of the few commercially supported, safety-certifiable embedded development toolchains for RISC-V targets. IAR's functional safety certification including compliance with IEC 61508 and ISO 26262 tool qualification requirements is a critical enabler for RISC-V adoption in automotive and industrial safety applications, where unvalidated open-source toolchains are not acceptable under regulatory frameworks. The company's position in the RISC-V ecosystem is as a toolchain infrastructure provider whose services de-risk the RISC-V adoption decision for safety-system integrators, occupying a strategically important enablement role that is largely non-overlapping with IP vendor competition.

Infineon Technologies AG integrates RISC-V cores across two major product families: the PSoC 6 (Programmable System-on-Chip) platform for IoT and connected device applications, and the AURIX TC4xx automotive microcontroller family, where RISC-V lockstep cores are deployed as safety monitors within the established TriCore-based architecture. In November 2024, Infineon expanded its PSoC 6 RISC-V product portfolio with two new devices targeting industrial IoT and edge AI applications, integrating hardware security module (HSM) functionality alongside the RISC-V application core. The company's RISC-V strategy positions RISC-V as a modular subsystem within an established, safety-certified silicon platform allowing OEM customers to benefit from RISC-V's architectural flexibility without the full risk exposure of a platform transition.

Lattice Semiconductor Corporation integrates RISC-V soft processor cores within its low-power FPGA platforms, including the ECP5 and CrossLink-NX product lines. The company's positioning targets edge AI and embedded vision applications where the combination of a programmable logic fabric and a RISC-V control processor on a single device enables a flexible, field-upgradable system architecture. The Lattice Propel design environment provides GUI-based RISC-V system integration within the Lattice FPGA toolchain, reducing the design cycle for customers embedding RISC-V in FPGA-based control and inference platforms where hardware iteration speed is a competitive differentiator.

Microchip Technology Incorporated offers the PolarFire SoC, which integrates a quad-core RISC-V processor complex (with a dedicated real-time core) alongside a mid-range FPGA fabric a platform architecture targeting industrial edge intelligence, smart grid, and defense avionics applications. The PolarFire SoC runs Linux on its application cores while supporting deterministic hard real-time processing on the embedded E51 monitor core, enabling mixed-criticality application deployment without external processor coupling. In February 2024, Microchip introduced the PolarFire SoC MPFS250T, a higher-density variant targeting defense avionics and industrial functional safety applications with DO-254 design assurance qualification support. The company's established industrial and defense customer relationships provide qualified deployment pathways into application segments where new silicon platform qualification is otherwise a multi-year process.

Renesas Electronics Corporation has integrated RISC-V cores into select members of its RX-series and RA-series embedded microcontroller families, leveraging RISC-V's architectural openness to build differentiated IP for industrial and consumer electronics applications without the licensing overhead of a third-party ISA. In November 2023, Renesas integrated a RISC-V lockstep co-processor into the RX family of industrial microcontrollers, enabling ASIL-B safety monitoring without external safety MCU hardware. The company's scale in the industrial and automotive MCU market provides a significant commercial channel for RISC-V-enabled product variants as OEM procurement programs demand broader architecture diversity.

SiFive, Inc. is the market leader and the most commercially prominent pure-play RISC-V IP company globally. Its processor IP portfolio spans from the compact E20 series (single-stage pipeline, under 0.023 mm at 28 nm) to the high-performance Intelligence X390 series targeting AI accelerator and edge computing SoCs. SiFive's commercial relationships extend across US hyperscalers, automotive Tier-1 suppliers, and government defense procurement programs a breadth that reflects the maturity of its IP portfolio across application tiers and the depth of its foundry qualification records at TSMC N7/N5 process nodes.

StarFive Technology Co. Ltd. focuses on RISC-V application processor SoCs for embedded Linux and edge computing platforms. The JH7110 SoC deployed in the VisionFive 2 single-board computer and in a range of embedded gateway and edge server platforms integrates a quad-core SiFive U74 RISC-V application processor with an Imagination GPU, video processing engine, and PCIe/SATA interfaces. In July 2024, StarFive launched the JH8100 RISC-V SoC, targeting embedded Linux and edge AI gateway applications with an integrated neural processing unit (NPU) and PCIe Gen 3 interface support expanding the product line into higher-performance edge inference applications where the JH7110 lacked native AI acceleration.

Conversations with seven processor IP licensing executives during our Q4 2024 expert panel convened across semiconductor EDA, IP licensing, and foundry strategy functions converged on the view that the competitive boundary in RISC-V will shift from processor core performance to ecosystem services over the 2025–2028 window, with toolchain quality, safety certification support, and long-term IP maintenance commitments becoming the decisive procurement criteria for OEM and automotive customers migrating volume production programs to RISC-V silicon.

RISC-V Industry News

• Mar 2025: RISC-V International announced the ratification of the Profiles specification, establishing compatibility assurance standards for application, embedded, and microcontroller RISC-V processor market segments, with adoption commitments from SiFive, Andes Technology, and Codasip.
• Jan 2025: The RISC-V Software Ecosystem (RISE) project published stable Android RISC-V ABI specifications, marking a key milestone toward production-grade Android device support on RISC-V hardware platforms.
• Nov 2024: Infineon Technologies expanded its PSoC 6 RISC-V product portfolio with two new devices targeting industrial IoT and edge AI applications, integrating hardware security module (HSM) functionality alongside the RISC-V application core.
• Sep 2024: India's C-DAC (Centre for Development of Advanced Computing) validated the second-generation Vega RISC-V processor for government and defense electronics procurement under the MeitY IndiaChips initiative.
• Jul 2024: StarFive Technology launched the JH8100 RISC-V SoC, targeting embedded Linux and edge AI gateway applications, featuring an integrated neural processing unit (NPU) and support for PCIe Gen 3 interfaces.
• May 2024: The EU Chips Joint Undertaking announced funding allocation for three open-hardware processor research consortia in Germany, France, and the Netherlands, each incorporating RISC-V as the base processor architecture under the European Chips Act framework.
• Feb 2024: Microchip Technology introduced the PolarFire SoC MPFS250T, a higher-density variant of its RISC-V + FPGA platform targeting defense avionics and industrial functional safety applications, with DO-254 design assurance qualification support.
• Nov 2023: Renesas Electronics integrated a RISC-V lockstep co-processor into the RX family of industrial microcontrollers, enabling ASIL-B safety monitoring without external safety MCU hardware.
• Aug 2023: SiFive released the Intelligence X390 processor IP, targeting AI accelerator SoC designs with integrated RVV 1.0 vector units and a customizable AI instruction extension framework.
• Apr 2023: Google confirmed full RISC-V architecture support for Android Open Source Project (AOSP), establishing RV64GC as a Tier-1 supported ABI target a decision that materially expanded the RISC-V software ecosystem's relevance for consumer device manufacturers.

Market Concentration Score

The RISC-V market scores 8 out of 10 on the concentration scale, reflecting the top five players SiFive, Inc, Andes Technology Corp, Codasip S.R.O, Infineon Technologies AG, and Starfive Technology Co. Ltd collectively holding approximately 53.1% of global revenue in 2025 level of concentration typical of high-growth power semiconductor segments where qualification cycle length, automotive-grade certification requirements, and reference design ecosystem depth create durable barriers to entry that sustain incumbent advantage through the early commercial scaling phase.

The RISC-V market research report includes in-depth coverage of the industry with estimates & forecasts in terms of revenue (USD Million) and volume (million units) from 2022 to 2035, for the following segments:

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Market, By Architecture Type

• Standard RISC-V Architecture
• Custom RISC-V Architecture
• Extensible RISC-V Architecture

Market, By Industry Vertical

• Consumer Electronics
• Automotive
• Industrial & IoT
• Data Centers & HPC
• Networking & Telecom
• Aerospace & Defense
• Others

Market, By End User

• Chip Designers / IP Integrators
• OEMs / Device Manufacturers
• Software Developers
• Government & Defense Agencies
• Others

The above information is provided for the following regions and countries:

• North America
  • US
  • Canada
• Europe
  • Germany
  • France
  • UK
  • Netherlands
  • Spain
  • Italy
• Asia Pacific
  • China
  • Japan
  • South Korea
  • India
  • Australia
• Middle East & Africa
  • Saudi Arabia
  • UAE
  • South Africa

• Latin America
  • Brazil
  • Argentina
  • Mexico